Skip to content
OnlyProjects
B.Tech / B.E. · Electrical & ElectronicsFor educational purposes only
Code included

Three-Phase Supply Quality Monitor with Sag, Swell and Unbalance Event Log

Catch the sags, swells and unbalance that trip lab feeders and colony pumps

Mapped to your syllabusJNTUH R22 · EE801PC Project Stage-II incl. Seminar · IV-2

Overview

1 min read

Three-Phase Supply Quality Monitor (SQM-3P) is an instrument our final-year EEE team built to watch a real 415 V LT feeder the way a power-quality engineer would: continuously, three-phase, and with every disturbance written down. Isolation potential transformers and clip-on current transformers bring the three phases into safe measurement range; an ESP32 samples all six channels, computes per-phase RMS voltage, frequency, fundamental phasors and the negative-sequence unbalance factor, and runs an event engine that flags sags (below 0.9 per-unit), swells (above 1.1 per-unit), interruptions and unbalance excursions — each with a timestamp, magnitude, duration and a captured waveform snippet stored on microSD.

A desktop gateway imports the logs into a SQLite events database, and Python analytics turn the events into the questions maintenance staff actually ask: at what hour do sags cluster, which phase is worst, how long was the deepest event, and did the lab compressor or the colony pump start at that moment? The measurement style follows the spirit of IEC 61000-4-30 Class S (10-cycle aggregations) and the terminology of IEEE 1159, which makes the project viva-defensible at a standard level rather than a collection of ADC readings.

The Indian context motivates it: Hyderabad colony feeders see daily pump starts, cooler motors and single-phase unbalance, and a college machines-lab feeder is a perfect test bed — a motor start gives a real, repeatable sag to validate against. The build stays under ₹7,000 by reusing instrument-transformer principles from the machines and measurements labs rather than a commercial analyser.

Relevant for
Telangana
Level
Advanced · 16 weeks · team of 4
Common at
Jawaharlal Nehru Technological University Hyderabad, Dr. A.P.J. Abdul Kalam Technical University, APJ Abdul Kalam Technological University
Updated
Nov 2026

Syllabus alignment

JNTUH · R22

EE801PC · Project Stage-II incl. Seminar · IV-2 · 11 credits · CIE 40 + SEE 60

Subjects this project applies
  • Embedded C — ESP32 sampling and measurement firmware
  • Python — event analytics, dashboard and plots (Pandas, Matplotlib)
  • C — import gateway and database utilities
  • EE302PC Electrical Machines – I
  • EE404PC Digital Electronics
How it is evaluated

See your department's project guidelines.

Also fits: AKTU AICTE model (2020-21 onwards), KTU 2019 Scheme.

What's in the box

11 parts · 5 free · 2 previewed · 4 unlock for ₹2,000

Problem & synopsis

5 min read

Problem statement

Colleges, hostels and small industries across Telangana run three-phase feeders whose daily disturbances — motor starts, pump switching, single-phase load unbalance — go unrecorded. When equipment misbehaves, there is no evidence: nobody can say whether a sag occurred, when, on which phase, how deep or how long. Commercial power-quality analysers answer these questions but cost more than a lakh rupees, so they never reach the people who need them; cheap protection relays trip without keeping a history. What is needed is an open, standards-aware three-phase monitor that measures per-phase RMS, frequency and voltage unbalance with proper isolation, detects sags, swells, interruptions and unbalance excursions using IEEE 1159 thresholds, stores every event with magnitude, duration, timestamp and waveform evidence in a queryable database, and produces maintenance-ready analytics — all within a student budget of about ₹7,000 and a B.Tech major-project timeline.

Synopsis

Abstract

This project designs, builds and validates a low-cost three-phase power-quality monitor. Six channels (three voltages via isolation potential transformers, three currents via SCT-013 clip-on transformers) are sampled by an ESP32; firmware computes 10-cycle RMS values, frequency, fundamental phasors by DFT and the negative-sequence unbalance factor; an event engine detects sags, swells, interruptions and unbalance excursions per IEEE 1159 thresholds, writing timestamped records and captured waveforms to microSD. A gateway imports events into a SQLite database and Python analytics produce dashboards, hourly sag histograms and exportable reports. The instrument is validated on a college feeder using a staged motor-start sag and a switched single-phase unbalance as reference disturbances.

Introduction

Power quality problems in India rarely look dramatic: a pump start dims the lights, an overloaded phase runs hot, a PC reboots for no visible reason. Utilities care about these events at feeder level, and the standards give precise vocabulary: IEEE 1159 classifies disturbances, IEC 61000-4-30 prescribes measurement. But a Class A analyser costs over a lakh rupees, so college labs and small industries never see their own disturbance history. Our monitor brings that capability to a student budget with standards-aware measurement choices.

Existing system and gap

  • Commercial power-quality analysers cost ₹1 lakh+ and are locked instruments; small industries and college labs rarely own one.
  • Cheap protection relays only indicate that something happened: no record, no duration, no three-phase view.
  • Utility smart meters report energy, not disturbance events, at the consumer end.
  • Published student builds usually log single-phase instantaneous voltage — no aggregation window, no unbalance, no database, hence no analysis.

Proposed system

  • Safe analog front end: three 230 V-to-12 V isolation potential transformers and three SCT-013-000 current transformers with burdens, then anti-alias filtering and mid-rail biasing.
  • Measurement core: ESP32 sampling six channels at about 1–2 kHz each, computing 10-cycle (200 ms) RMS aggregates, zero-cross frequency, 50 Hz DFT phasors and the negative-sequence unbalance factor.
  • Event engine: sag/swell/interruption thresholds at 0.9/1.1/0.1 per-unit with hysteresis and minimum-duration rules; each event stores a one-second pre/post waveform buffer to microSD.
  • Data path: microSD CSVs → desktop gateway (C) → SQLite database with a documented schema → Python dashboards, hourly histograms and CSV exports.
  • Validation: multimeter cross-checks, a staged motor-start sag, a switched single-phase unbalance, and a week-long endurance run on the department feeder.

Feasibility

  • Technical: the signal chain uses instrument-transformer isolation and sampling rates the ESP32 handles comfortably; the DFT and sequence computations are final-year signal-processing territory, which is exactly what makes this an advanced major project. The riskiest item — ADC non-linearity — is handled with a calibration table and stated uncertainty.
  • Economic: transformers, CTs, ESP32, SD module and enclosure come to roughly ₹6,800, against ₹1 lakh-plus for a certified analyser.
  • Operational: the monitor clamps onto an existing feeder with no supply break; the lab technician installs CTs with the feeder switched off; the instrument is fuse-protected and fully isolated from the mains side.

Objectives

  1. 01Design an isolated analog front end using potential transformers and SCT-013 current transformers, with anti-alias filtering and ADC biasing, safe for permanent attachment to a 415 V LT feeder.
  2. 02Implement ESP32 firmware in embedded C that samples six channels, computes 10-cycle RMS aggregates, zero-cross frequency and 50 Hz DFT fundamental phasors.
  3. 03Compute the negative-sequence voltage unbalance factor from the phase phasors and report it on the standard 0–2 per cent scale used in supply-quality discussions.
  4. 04Build an event engine that detects sags, swells, interruptions and unbalance excursions per IEEE 1159 thresholds with hysteresis, and captures a one-second waveform buffer per event to microSD.
  5. 05Design a SQLite events database with a documented schema, populated by a C import gateway, supporting queries by time, phase, type and depth.
  6. 06Develop Python analytics: hourly sag histograms, per-phase unbalance profiles, longest-event tables and exportable CSV reports.
  7. 07Validate the instrument against laboratory references, including a staged motor-start sag and a deliberately created single-phase unbalance, with a stated uncertainty budget.

Scope

In scope

  • One 415 V LT feeder in the department machines lab, monitored for a multi-week endurance run.
  • Measurement of per-phase RMS voltage (10-cycle aggregates), frequency, line currents and negative-sequence voltage unbalance.
  • Event detection for sags (below 0.9 pu), swells (above 1.1 pu), interruptions (below 0.1 pu) and unbalance beyond 2 per cent, with hysteresis and duration rules.
  • microSD logging of aggregates and event waveform snippets; SQLite database and Python dashboards on the PC.
  • Validation against multimeters, a staged motor-start sag, and a switched single-phase unbalance.

Out of scope

  • Certified IEC 61000-4-30 Class A compliance (we follow Class S-style aggregation; the difference is documented).
  • Sub-cycle transients and high-frequency harmonics beyond the 50th — the sampling rate does not support them.
  • Harmonic spectrum analysis beyond the fundamental (THD estimation is future scope).
  • Tripping or protection action; the instrument observes and records, it never switches the feeder.
  • Web/cloud dashboards; analytics run on the department PC for viva-day reliability.

Methodology

The project follows the V-model, matching JNTUH R22's two-stage structure: Stage-I (EE704PC) produces the verified design and plan, Stage-II (EE801PC) delivers the built, tested instrument.

PhaseWeeksActivitiesVerification
Literature and standards study1–2IEEE 1159 disturbance taxonomy; IEC 61000-4-30 aggregation; CT/PT practiceSurvey report, problem statement (Stage-I)
Requirements and design3–4Signal-chain design, thresholds, database schema, firmware architectureDesign review with guide committee
Front-end build5–7PT and CT boards, burden sizing, filtering, biasing, safety checksChannel-by-channel accuracy vs multimeter
Measurement firmware8–10Timed ADC sampling, RMS, frequency, DFT phasors, unbalanceBench tests with function generator and variac-fed sample coils
Event engine and storage11Thresholds, hysteresis, waveform capture, SD loggingInjected-test-event rehearsals
Database and analytics12C gateway, SQLite schema, Python dashboardsEnd-to-end query demonstrations
Field validation13–14Motor-start sag staging, unbalance test, multimeter cross-checksValidation report with uncertainty budget
Endurance and documentation15–16Week-long logging on the feeder, report, seminar and demoStage-II submission and seminar

Test plan: (1) unit tests — each measurement channel against calibrated meters at five points; (2) integration tests — injected signals from the lab function generator produce correct RMS, frequency and phasors; (3) functional tests — staged motor-start sag recorded with correct depth and duration on the correct phase; switched-load unbalance crossing the 2 per cent threshold and clearing on load removal; (4) endurance — a week of unattended logging with zero lost events verified by checksum counts. Every case is tabulated with expected, actual and status in the Stage-II report.

Architecture & tech stack

2 diagrams · 6 technologies · 2 min read

  • Embedded C (ESP32 firmware)
  • Python (Pandas, Matplotlib analytics)
  • C (import gateway and database utilities)
  • SQLite (events database)
  • ESP32 microcontroller
  • SCT-013 current transformers and isolation potential transformers

SQM-3P is a four-stage pipeline: isolated sensing, measurement computation, event capture, and analytics — with a database at the centre so every claim in the report is a query, not a screenshot.

flowchart TD
  FEEDER["3-phase LT feeder 415 V 50 Hz"] --> PT["3 isolation PTs 230 V to 12 V"]
  FEEDER --> CT["3 clip-on CTs SCT-013-000, one per line"]
  PT --> COND["Conditioning: divider + RC anti-alias + mid-rail bias"]
  CT --> BURDEN["Burden resistors + same conditioning"]
  COND --> ESP["ESP32: 6-channel ADC, 1-2 kHz per channel"]
  BURDEN --> ESP
  ESP --> CALC["Firmware: 10-cycle RMS, frequency, DFT phasors, unbalance factor"]
  CALC --> SD["microSD: aggregate CSV + event waveforms"]
  CALC -->|USB serial| GW["C import gateway on lab PC"]
  SD --> GW
  GW --> DB[("SQLite events database")]
  DB --> AN["Python analytics: dashboards, histograms, CSV exports"]
  RTC["DS3231 real-time clock"] --> ESP

Sensing. Isolation potential transformers step each phase-to-neutral down to a measurable level and give galvanic isolation — we never put a resistive divider directly across the mains. SCT-013-000 clip-on CTs sense line currents without breaking the feeder; their burdens stay permanently connected because an open-circuited CT is a safety hazard, and the report explains why.

Measurement core. The ESP32 samples all six channels on a hardware-timer schedule. Firmware maintains a rolling two-second buffer; every 200 ms (one 10-cycle window at 50 Hz, the Class S-style aggregation) it emits per-phase RMS, zero-cross frequency, and — on a slower tick — the fundamental phasors from a rectangular-window DFT, from which the negative-sequence unbalance factor is computed. The ADC's known non-linearity is handled by a piecewise calibration table measured against laboratory meters, and the residual appears in the uncertainty budget.

Event engine and storage. Thresholds compare the aggregate RMS against 0.9/1.1/0.1 per-unit with hysteresis to stop chatter; unbalance events use the 2 per cent planning level. On trigger, the engine dumps one second of pre-buffered waveform around the event to microSD with a DS3231-stamped timestamp.

flowchart LR
  A["Aggregate RMS every 200 ms"] --> B{"Below 0.9 pu?"}
  B -->|Yes| C["Sag begins: stamp and buffer"]
  C --> D{"Back above 0.9 pu + hysteresis?"}
  D -->|Yes| E["Sag ends: write magnitude, duration, waveform"]
  B -->|No| A

Analytics. The C gateway imports SD files into SQLite (tables: events, daily_summary, calibration), and Python answers maintenance questions: sags by hour, phase-wise unbalance profiles, the ten deepest events, and CSV exports for the report — each plotted figure traceable to one SQL query.

Modules

6 modules

  1. Module 01

    Analog Front End (Member A)

    Designs and builds the PT and CT boards: burden sizing from CT datasheet behaviour, divider and anti-alias RC selection, mid-rail biasing, protection components, fusing, enclosure layout, and the channel-by-channel accuracy check against laboratory meters.

  2. Module 02

    Measurement Firmware (Member B)

    Writes the ESP32 embedded C: timer-driven six-channel sampling, the rolling buffer, 10-cycle RMS aggregation, zero-cross frequency tracking, rectangular-window DFT for fundamental phasors, negative-sequence unbalance computation, and the ADC calibration table.

  3. Module 03

    Event Engine & Storage (Member C)

    Implements sag/swell/interruption/unbalance detection with hysteresis and minimum-duration rules, the pre/post waveform capture from the rolling buffer, microSD CSV writing with checksums, and the DS3231 time-stamping discipline.

  4. Module 04

    Database & Analytics (Member D)

    Builds the C import gateway, the SQLite schema (events, daily_summary, calibration tables with indexes), and the Python analytics: hourly sag histograms, unbalance profiles, longest-event tables, and the CSV exports used in the report.

  5. Module 05

    Calibration & Validation (shared)

    Plans and executes the validation matrix: five-point meter cross-checks, function-generator integration tests, the staged motor-start sag with the machines-lab staff, the switched-load unbalance test, and the written uncertainty budget.

  6. Module 06

    Installation, Safety & Documentation (shared)

    Owns the safe-attachment procedure (feeder switched off for CT clipping, burdens always connected, PT fusing, no exposed conductors), the week-long endurance operation, and the Stage-II report chapters and seminar slides.

Slides

13 slides · titles free · bullets, notes and the .pptx unlock

  1. Slide 1

    Three-Phase Supply Quality Monitor

  2. Slide 2

    Motivation

  3. Slide 3

    Standards Foundation

  4. Slide 4

    Problem Statement

  5. Slide 5

    System Architecture

  6. Slide 6

    Analog Front End

  7. Slide 7

    Measurement Core

  8. Slide 8

    Event Engine & Database

  9. Slide 9

    Validation

  10. Slide 10

    Results & Analytics

  11. Slide 11

    Limitations

  12. Slide 12

    Stage-wise Mapping (EE704PC → EE801PC)

  13. Slide 13

    Conclusion & Future Scope

Bullets, speaker notes and the .pptx · ₹2,000

The titles above are the real outline. The rest is what you present from.

Unlock for ₹2,000

Viva questions & answers

3 of 15 answered free · 12 unlock

Read each answer, close it, and say it in your own words. Your viva will ask. Now you'll know.

  1. 01Concept

    What is a voltage sag and a swell, and what thresholds did you use?

    A sag is a short-duration reduction of RMS voltage and a swell a short-duration rise; IEEE 1159 classifies them by magnitude and duration. Our engine uses 0.9 per-unit as the sag threshold, 1.1 per-unit as the swell threshold and 0.1 per-unit for an interruption, applied to 10-cycle RMS aggregates with hysteresis so a hovering value does not create event chatter. The thresholds come straight from the standards discussions, not from our convenience.

  2. 02Concept

    Explain voltage unbalance and the definition you implemented.

    Unbalance exists when the three phase voltages differ in magnitude or are not 120 degrees apart. We compute the true negative-sequence definition — the ratio of negative-sequence to positive-sequence voltage magnitude — from fundamental phasors estimated by DFT, which is the definition standards bodies prefer. The simpler NEMA magnitude-deviation figure is easier but misses phase-angle unbalance, so our report shows both for one day of data and explains the difference.

  3. 03Concept

    Why do you aggregate over 10 cycles instead of reporting instantaneous samples?

    Instantaneous samples swing between zero and peak every cycle, so they are useless for disturbance thresholds. The 10-cycle window — 200 milliseconds at 50 Hz — is the IEC 61000-4-30 aggregation style: it is a fixed multiple of the nominal period, so it rejects the fundamental's own ripple deterministically, gives stable RMS values for thresholding, and still resolves events long enough to matter for equipment. We say clearly that we follow Class S-style aggregation, not certified Class A processing.

+12 more questions, with answers

Try the free ones out loud first. Your examiner will not accept “it's in the PPT”.

Source code & how to run

12 steps · complete source code · unlocks with the project

Unlocks with the project · ₹2,000

12 steps · source code zip

Prerequisites, install, seed data and tests, written for demo day. Plus the complete source.

Unlock for ₹2,000

READMEFIRST

286 words · unlocks with the project

What to change before it goes anywhere near a submission. Skipping it is how the demo fails live.

Unlocks with the project · ₹2,000

286 words · ~1 min read

The checklist of things to rename, re-seed and re-think so the project reads as yours.

Unlock for ₹2,000

Instructions

371 words · unlocks with the project

How to study it, adapt it and walk your examiner through it, step by step.

Unlocks with the project · ₹2,000

371 words · ~2 min read

Report structure, formatting rules and the submission checklist your department will grade.

Unlock for ₹2,000

References

7 sources

  1. IEEE Std 1159-2019 — Recommended Practice for Monitoring Electric Power Quality
  2. IEC 61000-4-30:2015 — EMC: Testing and Measurement Techniques — Power Quality Measurement Methods
  3. OpenEnergyMonitor — CT Sensors: An Introduction (SCT-013 interfacing and burden practice)
  4. Espressif ESP32 Series SoC — Official Product Documentation
  5. Roger C. Dugan, Mark F. McGranaghan, Surya Santoso, H. Wayne Beaty, Electrical Power Systems Quality, 3rd ed., McGraw-Hill
  6. C. Sankaran, Power Quality, CRC Press
  7. EN 50160 — Voltage Characteristics of Electricity Supplied by Public Distribution Networks (CENELEC)

Cite this bundle

OnlyProjects. (2026). Three-Phase Supply Quality Monitor with Sag, Swell and Unbalance Event Log: B.Tech / B.E. Electrical & Electronics project bundle [Educational resource]. https://onlyprojects.online/projects/btech-eee-three-phase-supply-quality-monitor-events-log

Future scope

1 min read

  • Add a THD estimator (up to the 25th harmonic within our sampling budget) for a fuller voltage-quality picture.
  • Move the database to a Raspberry Pi at the feeder so the gateway runs unattended and dashboards are live over the LAN.
  • Implement IEC flicker (Pst) estimation and add flicker events alongside sags and swells.
  • Correlate the event log with energy-meter readings to quantify the cost of poor quality to a small industry.
  • Train a simple classifier on event waveforms to label causes (motor start, capacitor switching, load step) automatically.
  • Pursue Class A alignment with a better ADC front end and the standard's full aggregation and marking-FLAG requirements.

Keep browsing

Same degree, same syllabus slot, different idea. Pick the one your guide will actually approve.

B.Tech / B.E.Code included

Electrical & Electronics

Solar MPPT Charge Controller Test Bench with Logged I-V Curves

Characterise PV panels and tune MPPT tracking with logged data, not guesswork

  • Arduino Uno (C/C++ firmware)
  • Python (NumPy, Matplotlib)
  • MATLAB / Scilab (modelling and curve fitting)
  • +3

intermediate14 wk4 students

B.Tech / B.E.Code included

Aerospace / Aeronautical

Low-Speed Open-Circuit Wind Tunnel with Force Balance for Aerofoil Lift-Drag Measurement

Build a subsonic test tunnel on a student budget, then trace lift and drag on a 3D-printed NACA 0012 against theory

  • C / Arduino Uno (industry-standard extra) — HX711 load-cell and serial logging firmware
  • Python (NumPy, Matplotlib) — calibration, force coefficients and plots
  • MATLAB / Scilab — thin-airfoil theory overlay and regression
  • +4

intermediate14 wk4 students