Capacitor-Based Power-Factor Correction Bench Study for Small Inductive Loads

PF-Bench is a measurement-and-correction study on a live single-phase bench: the team measures the true power factor of the loads every Indian workshop actually runs — a ceiling fan, a single-phase induction motor, a fluorescent lamp with its magnetic ballast, and combinations of all three — then corrects the power factor with a switched capacitor bank and quantifies what changes: line current, apparent power, and the I²R distribution loss that the utility charges somebody for.

Measurement is by a PZEM-004T v3.0 power meter (V, I, active power, PF, frequency over Modbus-RTU) read by an Arduino Uno logging second-by-second records, cross-checked against the department clamp meter and DMM through a written verification table. The correction side is a bank of motor-run capacitors in switchable steps; the team computes required kvar from Qc = P·(tanφ₁ − tanφ₂), applies the nearest step, and traces the power-factor-versus-capacitance curve — including deliberate overcorrection into leading power factor, the mistake real installations are fined for.

Two honest layers lift the project above a routine lab experiment. First, a tariff-savings analysis applies the power-factor penalty structure that Indian regulators (KERC among them) write into tariffs, converting measured kvar into rupees. Second, a nonlinear-load test on an LED driver or SMPS shows where capacitors stop working: displacement power factor improves, but the distorted current of a nonlinear load does not, which motivates the IEC 61000-3-2 harmonics discussion in the report. All mains work follows a written bench-safety protocol under faculty supervision.

Indian distribution tariffs penalise low power factor or bill on kVAh precisely because reactive current wastes distribution capacity: it heats lines and transformers without doing useful work. Yet electrical engineering students meet power factor almost entirely as phasor algebra. They rarely measure a real motor's power factor at rated and partial load, never see line current fall when capacitors switch in, and never connect the measurement to the tariff arithmetic that makes industry care. Meanwhile the popular fix is oversimplified: students 'know' capacitors improve power factor but not how to size the steps, what overcorrection does, or why a capacitor bank cannot fix a nonlinear SMPS load whose distortion current remains no matter what the meter's displacement reading says.

There is a need for a bench-scale, instrument-verified power-factor study: measure real loads at 1-second resolution, correct them with a properly sized and protected switched capacitor bank, quantify current, loss and tariff-penalty changes from logged data, and demonstrate — not just mention — the nonlinear-load boundary where capacitor correction stops helping.

Abstract

Low power factor means excess line current, excess I²R loss and, in Indian tariffs, direct penalties or kVAh overbilling. This project builds a bench rig that measures V, I, active power and power factor of common inductive loads at 1-second resolution with a PZEM-004T meter logged by an Arduino Uno, verifies the meter against a clamp meter, and corrects power factor with a switched motor-run capacitor bank. The team maps PF versus capacitance per load, runs a stepped correction on a mixed load, quantifies current and loss saving, applies a KERC-style penalty arithmetic, and demonstrates the nonlinear-load case where capacitors alone fail. Consumables cost under ₹2,500.

Introduction

Utilities bill industries on apparent power or penalise power factor below a threshold — KERC's ESCOM tariffs penalise consumption below 0.9, for example — yet classrooms teach reactive power as pure phasor algebra. The gap between 'power factor is cos φ' and 'a 0.75 power factor on your 1 kW motor draws 1.33 kW-worth of current' is where this project works: real loads, real meter readings, real capacitor steps, rupee consequences from measured numbers.

Existing System

• Textbook treatments end at the phasor diagram; the capacitor sizing formula is memorised but never validated on a load.
• Lab sessions measure power factor once, with no logging, no load-variation study and no correction step.
• Industrial APFC panels exist but are sealed boxes; their logic is invisible to students.
• Limitations: no quantified link between power factor, line current, loss and tariff penalty; and no treatment of nonlinear loads, where the cos-φ picture breaks.

Proposed System

• Measurement node: PZEM-004T in the bench line, Modbus-RTU to an Arduino Uno, 1-second CSV logging; instrument verified against clamp meter and DMM before any campaign.
• Correction hardware: motor-run capacitor steps (2.5, 4 and 7.9 µF, each with a bleed resistor) switched manually, wired parallel to the load under an MCB.
• Load campaigns: PF-versus-capacitance curves per load; a mixed-load APFC-style sequence (hold ≥ 0.95, avoid overcorrection); a partial-load study showing PF collapse at light load.
• Analysis: line-current and loss reduction per step, kVA release, and rupee saving per the penalty arithmetic; all tables regenerate from the CSV logs in Python/Excel.
• Honesty layer: a nonlinear-load experiment (LED/SMPS) separating displacement power factor from distortion, referencing IEC 61000-3-2, plus a written safety protocol.

Feasibility Study

• Technical: every component is a standard documented module with a public Modbus register map and an open-source library. Clamp-meter verification bounds measurement error before any conclusion; the mains-exposure risk is contained by MCB, insulated enclosure and shrouded terminals.
• Economic: the full rig is about ₹2,500 — the PZEM module, Uno, capacitors, switchgear and enclosure — with instruments borrowed from the department.
• Operational: experiments use the department's existing bench loads, wired to a bench socket only. Sessions fit 3-hour lab slots — about nine bench days over 14 weeks. The discharge procedure (bleed resistors plus a DMM check) is written into the SOP.

In scope

• Single-phase 230 V bench loads up to 5 A: fan, single-phase induction motor, fluorescent lamp with magnetic ballast, LED/SMPS load, and their combinations.
• Manual switched capacitor correction with motor-run capacitors, per-step bleed resistors, MCB protection and a written discharge procedure.
• 1-second CSV logging with instrument-verification tables; offline analysis in Python/Excel.
• Tariff-savings arithmetic presented as an educational estimate based on a KERC-style rule, with assumptions stated.

Out of scope (v1)

• Automatic (relay/contactor-based) APFC control — the v1 switching is manual by design; automation is a listed extension.
• Three-phase loads, HT-level correction, and any wiring into the building or utility supply.
• Harmonic spectrum measurement with a power-quality analyser — the nonlinear-load study is qualitative plus meter-based, with spectrum analysis as an extension.
• Active PFC converter design (boost-converter hardware); the ON Semiconductor handbook is cited for the theory rather than built.

The project follows a verification-driven build (V-model applied to a bench rig): every design artefact — measurement node, capacitor bank, campaign plan — pairs with a matching verification stage before the next stage begins, because conclusions about 'improvement' are worthless if the meter itself is unverified.

Testing approach: instrument-level tests first (meter vs clamp meter at several loads, logged in the error table), then negative and boundary tests — switching a step that overcorrects on purpose, running the motor at no load, switching a capacitor with the load off — each as a row in a test-case table (ID, input, expected, actual, result). Every campaign is logged to CSV, and all report tables regenerate from the raw logs with the analysis scripts, so the numbers shown in the viva can be re-derived live.

The rig is a single-phase measurement-and-correction chain around the department's existing bench loads.

flowchart TD
  SUPPLY["230 V single-phase bench supply"] --> MCB["MCB + protection"]
  MCB --> PZEM["PZEM-004T v3.0: V, I, P, PF, Hz, energy"]
  PZEM --> LOAD["Load line: fan / induction motor / ballast lamp / SMPS"]
  CB["Switched capacitor bank: 2.5 / 4 / 7.9 uF steps, bleed resistors"] -->|"parallel with load, rotary switch"| LOAD
  PZEM -->|"Modbus-RTU over UART"| UNO["Arduino Uno: C firmware"]
  UNO --> LCD["16x2 LCD: live V, I, P, PF"]
  UNO --> CSV["Laptop serial: 1-second CSV log"]
  CSV --> AN["Python/Excel: PF-vs-C curves, loss and savings tables"]
  CM["Clamp meter + DMM (department)"] -->|"instrument verification"| PZEM

The measurement path is deliberately separate from the correction path: the PZEM sees whatever the load plus capacitor combination draws, so each switch step's effect appears directly in the logged record. The capacitor bank is wired in parallel with the load, downstream of the meter, exactly as a real panel would — which is what makes the line-current reduction the meter reports physically meaningful rather than an internal artefact. The verification instruments (clamp meter, DMM) close the loop: the error table they produce is printed in the report, and every power-factor claim carries it.

• Automatic APFC controller: replace the rotary switch with relay- or contactor-switched steps driven by the Arduino from the measured PF, with a dead-band and switching-delay design — the rig becomes a working miniature APFC panel.
• Harmonic measurement upgrade: add a current-transformer-based sampling channel and FFT in Python to quantify THD on the nonlinear load, completing the displacement-vs-true PF story with numbers.
• Three-phase extension: scale the rig to a small three-phase bench motor with per-phase correction, mirroring real industrial panels.
• Active PFC demonstration: build a small boost-converter PFC stage on a development board per the ON Semiconductor handbook and contrast passive capacitors with active shaping.
• Campus audit extension: apply the verified method to measure and correct a real department load (with permission), turning the bench study into a mini energy audit.